A central processing unit (CPU) or graphics processing unit (GPU) of a computer may include a microprocessor. The microprocessor may be configured to execute code compiled to its native instruction-set architecture (ISA) in addition to certain non-native ISAs.
When the microprocessor encounters non-native instructions, blocks of the non-native instructions may be converted to native instructions and may also be optimized—e.g., to increase speed of execution. Optimized blocks of native instructions corresponding to the original non-native instructions may be stored in an instruction cache for future use. However, code optimization may require significant computational effort. Optimizing every code block encountered by the microprocessor may present an unacceptable performance overhead in some systems.